Integrated circuit packages are widely used in consumer, commercial and military applications. With the current advances in the state of the art, higher density and higher speed integrated circuit packages are being produced. However, as the density and speed of integrated circuit packages continues to increase, it becomes more important to ensure the stability of power which is distributed throughout the integrated circuit and to reduce electrical noise which may be generated by the power distribution.
FIGS. 1A, 1B and 1C illustrate a conventional integrated circuit package 10. As shown, an integrated circuit chip 6 includes first (top) and second (bottom) opposing faces. A plurality of pads 4 are formed on the first face of the integrated circuit chip 6. A plurality of external pins 2 are provided. A plurality of wires 12 electrically connect a respective external pin 2 with a respective pad 4. A lead frame 8 is also included for mounting the integrated circuit chip 6 thereon.
As shown in FIGS. 1B and 1C, power is distributed within the chip 6 of a conventional integrated circuit package 10 by providing an electric current 14 from a power source 18 to the chip 6 and the lead frame body 8 through the bonding wire 12. Accordingly, the power transmitted to a block "a" within the integrated circuit 6 may be derived from the following equation: EQU Va=Vs-i.times.(RL+RW+RS.times.square number)&lt;Vs
wherein Va represents the potential of the block a; Vs represents the voltage of the power source 18; i represents the electrical current 14; RL represents the resistance of the lead; RW represents the resistance of the bonding wire 12 and RS represents the resistance of a wafer substrate of the chip 6.
It will be understood that the resistance of the integrated circuit chip may reach several hundreds of ohms. Due to this resistance, a voltage drop may occur at point 16 on the chip. Accordingly, across the chip, internal voltage differences may occur. This may cause latch-up of the circuits on the chip or other improper operations. In order to avoid these problems, the density, speed or margins of the circuit may need to be relaxed. Moreover, the limitation on a number of power pads which are available on the chip may also create power supply voltage drop, latch-up or other noise problems.